Logical models of macroelements made of faulty current switches

Logical models of macroelements of emitter-linked logic, ELL, can be composed by the logical function or by the transistor wiring diagram. Both kinds are analyzed. In the wiring diagram faults such as «the transistor is continuously open» and «the transistor is continuously closed» can be considered. In a logical model assembled as a transistor wiring diagram such faults can be represented as constant faults «1» and «0» in the points associated with transistor control electrodes and the signal output points. A way to develop logical models with constant faults representing physical faults of transistors is developed. Examples of logical decoder and ELL $D$-flip-flop are provided; the relationships are revealed between physical faults in the wiring diagram and constant faults in the logical circuit.