A regular method of test sequence design. Correctness of the checking sequence

An analytical computer-oriented method is proposed for computing sets which correctly transit changes in the logical value from the fault origination point to the circuit output. In the computations the criterion is absence of hazards and the faultrisk separately of a faultless circuit and circuit with a fault. Constraints imposed by the faulty circuit are considered. Cubic coverings are used in the computation. The resultant sets can control a constant single fault. An example of designing a checking sequence for a two-digit register is given.