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JOURNALS // Diskretnyi Analiz i Issledovanie Operatsii // Archive

Diskretn. Anal. Issled. Oper., 2018 Volume 25, Issue 2, Pages 62–81 (Mi da896)

This article is cited in 2 papers

Complete fault detection tests of length 2 for logic networks under stuck-at faults of gates

K. A. Popkov

Keldysh Institute of Applied Mathematics, 4 Miusskaya Sq., 125047 Moscow, Russia

Abstract: We consider the problem of the synthesis of the logic networks implementing Boolean functions of n variables and allowing short complete fault detection tests regarding arbitrary stuck-at faults at the outputs of gates. We prove that there exists a basis consisting of two Boolean functions of at most four variables in which we can implement each Boolean function by a network allowing such a test with length at most 2. Illustr. 1, bibliogr. 33.

Keywords: logic network, stuck-at fault, complete fault detection test.

UDC: 519.718.7

Received: 06.10.2017

DOI: 10.17377/daio.2018.25.592


 English version:
Journal of Applied and Industrial Mathematics, 2018, 12:2, 302–312

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© Steklov Math. Inst. of RAS, 2025