Single tests for logical gates

The paper is concerned with checking problems for failure and state diagnostics of $N$ gates implementing in a working condition a given Boolean function $f(x_1,\ldots,x_n)$. This problem is solved by composing single-output circuits from these gates and analyzing the output values of these circuits on all input tuples of variables. An arbitrary constant malfunction at the output of any single gate is allowed. It is required to minimize the number of circuits required for a check for failure and determination of all states of all gates. Exact values for the minimal possible number of such circuits are obtained.