An algorithm for minimization of Boolean functions in the class of Toffoli reversible logic circuits

In this paper, the problem of Boolean function's representation by the reversible circuits constructed of the Toffoli gates is considered. Interest in this problem is connected with actual studies of the possibility for realization of "cold" computations. It means that when performing such computations, there is no heat dissipation.
In general, reversible circuits realize reversible functions. Therefore, Toffoli–Fredkin's method for representation of the Boolean function by the reversible function is used.
In work, an algorithm for finding the minimal representation of the Boolean function in a class of the reversible circuits, which are constructed from Toffoli elements is described. The algorithm uses the polynomial normal forms or exclusive-or sum-of-products expressions (ESOPs) of the Boolean function in the operator representation and the problem of finding the minimal representation of the Boolean function in the certain class of operator bundles. The chosen class of operator bundles corresponds to a class of the extended polarized Zhegalkin polynomials, which includes a well-known class of the polarized Zhegalkin polynomials or Reed–Muller forms.
In conclusion, the computational results of the algorithm for minimizing the Boolean functions in the class of reversible circuits are given.