Analog models for ternary combinational logic elements

Background and Objectives: It is already obvious today that the performance of modern microprocessors is approaching its limit. Increasing the clock frequency and increasing the performance of the transistors included in them by reducing their size is becoming increasingly difficult due to fundamental physical limitations. Possible ways to increase the performance of microprocessors can be found through the introduction of fundamentally new materials and technologies, which is associated with the need for partial or complete abandonment of modern technology for the production of electronic components. However, there is also a development option that makes it possible to increase the performance of microelectronic devices without abandoning familiar and established technologies, both in the field of creating integrated circuits and microarchitecture. The transition of digital technology from a binary base to a ternary number system, that is, the use of three possible states within one digit – false/uncertain/true – allows one to obtain a number of advantages and, in general, provides a real opportunity to increase the performance of microprocessor technology, all other things being equal. In this regard, the goal of the work is to develop analog models of ternary logic elements that are compatible in characteristics with modern series of binary CMOS logic elements that can allow one to correctly simulate complex digital circuitry devices containing such elements. Materials and Methods: A software package for analysis and automatic design of electronic circuits was used to develop analog models of ternary logic elements. This program made it possible to analyze transient processes, parameters and interaction features of the developed logical elements. Results: A working prototype of a ternary logic element has been completed using standard discrete electronic components, which confirms the correctness and efficiency of the developed models of ternary logic elements. Conclusion: The proposed analog models of ternary logic elements allow one to correctly simulate complex digital circuitry devices containing such elements. Based on the proposed models, the main units of the ternary processor have been subsequently designed.