Influence analysis of comparator parame-ters spread on decision accuracy in DAC self-calibration circuit

The article presents an analysis of the influence of the comparator parameter spread in the digital-to-analog converter (DAC) self-calibration circuit on the reduction of the conversion nonlinearity. DAC on sources with a switching-based self-calibration circuit is considered. The comparator response threshold value due to the spread of component parameters for 0.18 $\mu$m CMOS technology (HCMOS8D by “Mikron”) is estimated. The comparator response threshold values are obtained for three sizes of comparator components. Functional modeling of the switching calibration taking into account the finite threshold of element comparison showed that the choice of the sorting algorithm affects the reduction of the conversion nonlinearity. It should be noted that for the smallest comparator option, only quick sort can provide an improvement in the integral nonlinearity for all considered conditions. The optimal size of the comparator components is determined in terms of the efficiency of nonlinearity reduction. The quick sort algorithm shows the best results both in nonlinearity reduction and in the influence of the comparator switching threshold sign.