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JOURNALS // Program Systems: Theory and Applications // Archive

Program Systems: Theory and Applications, 2018 Volume 9, Issue 4, Pages 399–415 (Mi ps323)

This article is cited in 1 paper

Hardware, software and distributed supercomputer systems

Insufficient memory bandwidth on Stencil code: the advantage of a vector dataflow processor

N. I. Dikarev, B. M. Shabanov, A. S. Shmelev

Joint Supercomputer Center

Abstract: The main factor limiting performance for the most part of highperformance computing applications is insufficient memory bandwidth, not computational power. Software methods for overcoming this drawback are block methods localizing memory accesses within fast on-chip memory, and “software pipelining” for organizing calculations in the form of chains of arithmetic commands between memory accesses.
Software pipelining was applied to the 2D and 3D Stencil programs in vector dataflow processor. Achieved performance was significantly higher than it is possible to get for the best traditional processors. (In Russian).

Key words and phrases: vector processor, dataflow architecture, shared-memory multiprocessor, performance evaluation.

UDC: 004.27

Received: 12.11.2018
05.12.2018
Accepted: 30.12.2018

DOI: 10.25209/2079-3316-2018-9-4-399-415



© Steklov Math. Inst. of RAS, 2025