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JOURNALS // Sistemy i Sredstva Informatiki [Systems and Means of Informatics] // Archive

Sistemy i Sredstva Inform., 2014 Volume 24, Issue 3, Pages 78–91 (Mi ssi361)

This article is cited in 3 papers

Modern trends in evolution of integrated network processor architectures

V. Egorov

Institute of Informatics Problems, Russian Academy of Sciences, 44-2 Vavilov Str., Moscow 119333, Russian Federation

Abstract: The article points out the increasing role of programmable integrated network processors (INP) in developments of up-to-day packet switches, routers, and various devices for network infrastructure. The article gives an analysis of recent trends in INP architecture evolution and distinguishes different programmability levels and the most significant INP macroarchitecture components. The article reveals interdependence between macroarchitecture and opportunity to arrange inside an INP internal virtual pipelines for deterministic packet processing with high throughput and shows the crucial role of a queue manager in achieving efficient functioning of the virtual pipelines inside an INP. The article mentions the advantages of high-speed serial interfaces with interaction on the pear-to-pear basis as an attaching facility to a shared external switching fabric.

Keywords: integrated network processor; multicore processor; macroarchitecture; virtual pipeline; queue manager; high speed serial interfaces.

Received: 17.07.2014

DOI: 10.14357/08696527140306



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