Abstract:
Designing of self-timed electronic circuits having unique properties requires special methods. Combinational circuits can consist of several sections representing a variety of elements performing parallel functional transformations. The known event method of self-timed circuit synthesis has theoretical significance only and is unsuitable for real design. The author proposes a new method, which describes functional sections not by events (switchs of elements) but by logical functions and equations. The method consists in generating and solving logical equations. The method solves the problem in the most general form and allows choosing elements for circuit implementation from semicustom or custom libraries.