An approach to test program generation for memory coherence verification of “Elbrus” microprocessors

One of the key aspects of the correctness of the memory subsystem of a microprocessor is its functioning in accordance with the memory coherence protocol. This article presents an approach to test program generation for memory coherence verification of “Elbrus” microprocessors. Requirements for memory coherence tests are considered. The memory map structure allowing to describe the memory areas used in tests and the types of accesses to these areas in a flexible way is presented. The method of test program generation based on the memory map structure is described. The method of automatic memory map generation is proposed. Generated tests have been used for verification of RTL models and FPGA-based prototypes.