Abstract:
This article presents the design of the modified error detection and localization algorithm in the Residue Number System (RNS). Classical redundant RNS with one control modulus can detect one error but not localize it. Two control moduli are used to localize a single error. Presented algorithm can achieve an error correction with a single control modulus transmitted over a reliable communication channel. The proposed approach was verified using Verilog on ASIC in RTL and physical synthesis tool Cadence Genus Synthesis Solution. It significantly reduces the area of the hardware implementation increasing the packing density and more efficient use of silicon resource. It slightly increases the running time compared with the classical algorithm. Distributed data storage was developed to study efficiency of the proposed algorithm.
Keywords:redundant residue number system, error detection, hardware simulation