Development of methods for automating high-level modeling of networks-on-chip

The paper analyzes the existing methods to optimize the time costs and increase the accuracy of calculations in the high-level simulation of networks-on-chip. The description of parameters and characteristics of networks-on-chip calculated by different models is given, and their influence on the speed of high-level simulation is analyzed. Adaptation of existing methods of modeling optimization for implementation in the system of automation of networks-on-chip design is carried out.