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Proceedings of ISP RAS, 2023 Volume 35, Issue 5, Pages 107–126 (Mi tisp818)

Development of the trusted tools for IC design on heterogeneous FPGAs

S. V. Gavrilov, D. A. Zheleznikov, M. A. Zapletina, I. V. Tiunov, V. M. Khvatov, R. Zh. Chochaev, D. B. Shokarev

Institute for Design Problems in Microelectronics of Russian Academy of Sciences

Abstract: This paper focuses on the development of trusted tools for designing digital circuits in the basis of heterogeneous field programmable gate arrays (FPGAs). Designing heterogeneous FPGAs is one of the most actively growing areas in Russian microelectronics at present. The paper discusses the main problems and challenges associated with the development of trusted computer-aided design tools. The authors propose a relevant approach to the development of a computer-aided design system based on the use of open-source software tools together with proprietary developments for its critical components. This approach allows to increase the efficiency and reliability of the design process in the basis of heterogeneous FPGAs. The paper considers such stages of the design flow in the basis of heterogeneous FPGAs as logic synthesis and technology mapping, different stages of layout synthesis and static timing analysis. The work is of interest to specialists in the field of microelectronics, as well as to researchers involved in the development of IC design tools and systems. The research results contribute to the improvement of existing IC design methods and tools, as well as to the development and expansion of the Russian electronic component base.

Keywords: VLSI, FPGA, layout synthesis, logic synthesis, placement, routing, trusted software

DOI: 10.15514/ISPRAS-2023-35(5)-8



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