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Petrochenkov Mikhail Vladimirovich

Publications in Math-Net.Ru

  1. Test environment for verification of multi-processor memory subsystem unit

    Proceedings of ISP RAS, 31:3 (2019),  67–76
  2. Verification of system on chip integrated communication controllers

    Proceedings of ISP RAS, 30:3 (2018),  195–206
  3. Verification of 10 Gigabit Ethernet controllers

    Proceedings of ISP RAS, 29:4 (2017),  257–268
  4. Approaches to stand-alone verification of multicore microprocessor caches

    Proceedings of ISP RAS, 28:3 (2016),  161–172
  5. A model-based approach to design test oracles for memory subsystems of multicore microprocessors

    Proceedings of ISP RAS, 27:3 (2015),  149–160


© Steklov Math. Inst. of RAS, 2024