Romanov Dmitrii Sergeevich

Publications in Math-Net.Ru

1. On Diagnostic Test Sets for Local Mirror Reflections on Circuit Inputs
   
   Mat. Zametki, 115:5 (2024),  791–796
2. On Test Sets Concerning Local Stuck-at Faults of Fixed Multiplicity at the Inputs of Circuits
   
   Mat. Zametki, 114:3 (2023),  458–463
3. Single diagnostic tests for inversion faults of gates in circuits over arbitrary bases
   
   Diskr. Mat., 33:1 (2021),  20–30
4. Multiple fault k-diagnostic test sets for inverse faults of gates
   
   Intelligent systems. Theory and applications, 25:4 (2021),  161–165
5. On single detection test sets under replacements of gates with inverters
   
   Uchenye Zapiski Kazanskogo Universiteta. Seriya Fiziko-Matematicheskie Nauki, 162:3 (2020),  359–366
6. A method of synthesis of irredundant circuits admitting single fault detection tests of constant length
   
   Diskr. Mat., 29:4 (2017),  87–105
7. Короткие тесты для схем в базисе Жегалкина
   
   Intelligent systems. Theory and applications, 20:3 (2016),  73–78
8. A method of synthesis of irredundant circuits (in a standard basis) admitting single fault diagnostic test sets with cardinality 2
   
   University proceedings. Volga region. Physical and mathematical sciences, 2016, no. 3,  56–72
9. A method of synthesizing irredundant circuits, admitting small single fault diagnostic test sets at stuck-at faults at outputs of gates
   
   University proceedings. Volga region. Physical and mathematical sciences, 2016, no. 2,  87–102
10. Full detecting tests for Boolean functions for local linear faults of circuits' inputs
    
    Diskretn. Anal. Issled. Oper., 22:1 (2015),  51–63
11. A method of synthesis of irredundant circuits (in Zhegalkin's basis) admitting single fault diagnostic test sets with cardinality 1
    
    University proceedings. Volga region. Physical and mathematical sciences, 2015, no. 4,  38–54
12. On single detecting test sets for circuits of switching type
    
    University proceedings. Volga region. Physical and mathematical sciences, 2015, no. 1,  5–23
13. Method of synthesis of easily testable circuits admitting single fault detection tests of constant length
    
    Diskr. Mat., 26:2 (2014),  100–130
14. On the design of switching circuits admitting small detection test sets
    
    Uchenye Zapiski Kazanskogo Universiteta. Seriya Fiziko-Matematicheskie Nauki, 156:3 (2014),  110–115
15. On the synthesis of circuits admitting complete fault detection test sets of constant length under arbitrary constant faults at the outputs of the gates
    
    Diskr. Mat., 25:2 (2013),  104–120
16. A method for synthesis of easily-testable circuits in some basis admitting single fault detection tests of constant length
    
    Vestnik Moskov. Univ. Ser. 1. Mat. Mekh., 2012, no. 2,  24–29
17. On Full Checking Tests under Local Glueings of Variables in Boolean Functions
    
    Kazan. Gos. Univ. Uchen. Zap. Ser. Fiz.-Mat. Nauki, 151:2 (2009),  90–97
18. On the number of deadlock tests for closings of block circuits of parity counters
    
    Diskr. Mat., 9:4 (1997),  32–49