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Matrosova Anzhela Yur'evna

Publications in Math-Net.Ru

  1. Constructing a sequence detecting robustly testable path delay faults in sequential circuits

    Avtomat. i Telemekh., 2021, no. 11,  148–168
  2. Masking of internal nodes faults based on applying of incompletely specified Boolean functions

    Izv. Saratov Univ. Math. Mech. Inform., 20:4 (2020),  517–526
  3. Partially programmable circuit design oriented to masking Trojan circuits

    Proceedings of ISP RAS, 29:5 (2017),  61–74
  4. Properties of pairs of test vectors detecting path delay faults in high performance VLSI logical circuits

    Avtomat. i Telemekh., 2015, no. 4,  135–148
  5. Detection of false paths in logical circuits by joint analysis of the AND/OR trees and SSBDD-graphs

    Avtomat. i Telemekh., 2013, no. 7,  126–142
  6. Path delay fault test design for circuits obtained by covering ROBDDs with CLBs

    Prikl. Diskr. Mat., 2009, no. supplement № 1,  69–70
  7. Path delay fault classification

    Prikl. Diskr. Mat., 2009, no. supplement № 1,  68–69
  8. Path delay and multiple stuck-at fault test design for circuits derived from irredundant systems with factorized synthesis method

    Prikl. Diskr. Mat., 2009, no. supplement № 1,  65–66
  9. Construction of the tests of combinational circuit failures by analyzing the orthogonal disjunctive normal forms represented by the alternative graphs

    Avtomat. i Telemekh., 2005, no. 2,  158–174
  10. Self-Testing Automaton Networks: Their Design in Programmable Logical Matrices

    Avtomat. i Telemekh., 2002, no. 10,  120–136
  11. Synthesizing testable combinational circuits

    Avtomat. i Telemekh., 1999, no. 2,  129–137
  12. Ring Technology of Self-Testing for Hard-to-Detect Failures

    Avtomat. i Telemekh., 1996, no. 12,  155–163
  13. On a probabilistic simulation of discrete devices

    Avtomat. i Telemekh., 1995, no. 3,  156–164
  14. On a probability approach to computing estimates of controllability and observability of a node of a discrete device

    Avtomat. i Telemekh., 1993, no. 11,  152–160
  15. Design of testable automaton networks

    Avtomat. i Telemekh., 1991, no. 3,  143–152
  16. Seven-valued modeling of dead-beat automata

    Avtomat. i Telemekh., 1986, no. 3,  153–163
  17. Constructing tests for networks of integrated circuits

    Avtomat. i Telemekh., 1985, no. 10,  132–143
  18. Design and use of a single-step functional model of a dead-beat automaton

    Avtomat. i Telemekh., 1984, no. 5,  117–124
  19. Investigating a dead beat automaton functional model which recognizes structural hazards

    Avtomat. i Telemekh., 1982, no. 4,  94–104
  20. Design of a set of maximally stable states for a dead-beat automaton

    Avtomat. i Telemekh., 1982, no. 2,  67–74
  21. On a probabilistic approach tî testing of sequential devices

    Avtomat. i Telemekh., 1980, no. 1,  97–102
  22. A fault-detection method for a synchronous device

    Avtomat. i Telemekh., 1977, no. 12,  128–137


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