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Publications in Math-Net.Ru
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Desynchronization methodology at self-timed circuit synthesis
Sistemy i Sredstva Inform., 34:1 (2024), 33–43
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Hardware support of fast Fourier transform optimization in a recurrent signal processor
Sistemy i Sredstva Inform., 31:4 (2021), 71–83
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Recurrent signal processor hardware implementation
Sistemy i Sredstva Inform., 31:3 (2021), 113–122
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Multicore hybrid recurrent architecture expansion on FPGA
Sistemy i Sredstva Inform., 30:4 (2020), 95–101
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Hardware and software modeling and testing of the recurrent operational device
Sistemy i Sredstva Inform., 25:4 (2015), 78–90
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Theoretical aspects of programming methodology development for recurrent architecture
Sistemy i Sredstva Inform., 23:2 (2013), 133–153
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Dataflow architecture model and its usage with a word recognizer program as an example
Sistemy i Sredstva Inform., 22:2 (2012), 48–57
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System of capsule programming and debugging
Sistemy i Sredstva Inform., 20:1 (2010), 24–30
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Selection of programming languages for representing parallel algorithms for recurrent signal processor
Sistemy i Sredstva Inform., 2008, no. supplementary issue, 149–158
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