Петроченков Михаил Владимирович

Публикации в базе данных Math-Net.Ru

1. Test environment for verification of multi-processor memory subsystem unit
   
   Труды ИСП РАН, 31:3 (2019),  67–76
2. Verification of system on chip integrated communication controllers
   
   Труды ИСП РАН, 30:3 (2018),  195–206
3. Verification of 10 Gigabit Ethernet controllers
   
   Труды ИСП РАН, 29:4 (2017),  257–268
4. Approaches to stand-alone verification of multicore microprocessor caches
   
   Труды ИСП РАН, 28:3 (2016),  161–172
5. A model-based approach to design test oracles for memory subsystems of multicore microprocessors
   
   Труды ИСП РАН, 27:3 (2015),  149–160